Selecting a microcontroller is mostly a matter of choosing the right family before settling on a specific part. The family fixes the core architecture and the toolchain. It also ties the design to one vendor's supply for the life of the product. Sourcing and the eventual replacement bear on the family choice as much as the peripheral list does.
The decision that gets made under pressure
On a typical project the family is whatever the last one used. The firmware already runs on it, so changing now just creates rework. A clean-sheet pick shows up on first products, or after an old family has caused enough trouble to drop it.
What the team can already program matters more than the rival's extra features. A spec table is mostly for shortening the list. Moving to a new family is a driver rewrite. The team also loses everything it figured out about the old part the hard way. What decides it in the end is supply: the part has to be buyable in volume for as long as the product ships, at a price that holds through a shortage.
Allocation usually shows up about a year after the design freezes. The part you picked sees its lead time jump from a few weeks to the better part of a year. Now you are hunting for anything that drops in and ships today. The 2021 to 2023 shortage hit a lot of designs exactly this way. The shops that came through it had qualified a domestic equivalent in advance. Everyone else waited it out, or paid several times the going price. An independent distributor with stock on the shelf was often the only way to keep the line running.
Eight bits did not leave
Cost-sensitive designs still reach for 8-bit parts in the sockets where 8-bit holds on, a little cheaper than the nearest 32-bit part at the low end.
The crowded 32-bit middle
Between the M0+ and the M7 sits the part that catches the largest share of new general-purpose designs. The M33 joins them where a security boundary has to clear a certification. The M0+ anchors the cost-driven corner and the M7 the compute-heavy end, with the rest filling the span on one toolchain. What put the Arm Cortex-M at the center is its spread: the core is licensed to a long list of vendors, so one instruction set and one debug model carry across STMicroelectronics, NXP, and a dozen more. Two parts on that core diverge in almost everything wrapped around it. That divergence is the whole problem of choosing within Cortex-M. The clock tree alone can differ enough to throw off a UART baud rate until the dividers are retuned.
Say that STM32F1 doubles its lead time overnight. The fallback is a part from GigaDevice or Artery, built to match the pinout and much of the register map. That match is where the work begins. Boot pins and the common peripherals line up; the analog trim and the newer communication blocks are where the two parts drift apart. Proving the swap across a real design costs a board spin and a few weeks on the bench.
Why the exit cost should drive the choice
The figure that should anchor a family decision is not the unit price at volume but the cost of leaving the family later. Every part eventually goes scarce or draws an end-of-life notice. The only open question is whether that day lands in year two or year nine. A family that is cheap to leave spares a product the board respin and the firmware rewrite when it does.
Move from one STM32 line to a larger sibling and the firmware barely registers it, a linker script and a couple of clock settings apart. A jump to a different vendor on the same Cortex-M core costs more. The compiler and the debug flow carry over. The peripheral driver layer underneath, often half the firmware, has to be rewritten. The expensive case is a change of core architecture, 8-bit to Cortex-M or Arm to RISC-V, where the compiler and the whole driver stack are rewritten and the team's instincts reset with them. On a product already in the field, that last move can cost months of revalidating firmware that took years to settle.
A binary built for the original part boots on the replacement and runs clean on the bench. Three weeks into the field trial, it fails. That sequence is the signature of a pin-compatible swap, because pin-compatible only ever described the footprint. The core ports without drama, since the CMSIS abstraction and a shared instruction set let the same compiler output run on any vendor's build of it. The interrupt controller and the debug interface follow the Arm architecture reference manual to the letter. The blocks around the core follow nothing in common. Two parts with the same footprint and the same compatibility claim can number their timer channels differently and route DMA requests through unlike streams. One may need an extra flash wait state at the same clock. Its analog front end may settle to a different accuracy on the identical input. A timer running in a slightly different mode can shift a motor-control PWM edge by enough to matter, which a bench test at room temperature never shows. On a sealed product the same fault shows up in a returns stream, weeks after the units left the building. The field failure usually traces to one of these: an ADC reading a couple of least-significant bits low, or a USB block that enumerated fine on paper drifting because its clock recovery was tuned to a different crystal tolerance. Reset and brown-out thresholds add another, where a part that releases reset a few milliseconds early exposes a rail that had not finished rising. The boot ROM can differ enough that a bootloader keyed to the original option-byte layout bricks the first unit off the new reel. A safe swap budgets weeks to bring up every peripheral the design exercises and to read both errata sheets line by line, with the timing-sensitive code put back through regression, since the failures that count pass on the bench and surface at temperature or a few thousand units in. Much of that lands on whoever owns the firmware, because the board itself often stays the same. An automotive program pays again, since the swap can force requalification against AEC-Q100 and a fresh production-part approval that runs months on its own. The way to spend less is to draw the exit before the first layout, so the replacement sits on the schematic from day one. The firmware then keeps its vendor-specific code behind a driver layer thin enough that the swap touches a handful of files.
Export-control exposure changes which families even count as safe to build on. A part whose instruction set has a single owner can have its license or its supply cut by a decision made elsewhere. That risk is what has pulled RISC-V onto roadmaps still shipping on Arm. Sourcing teams have started asking for a path that stays open regardless of one government's export policy. How far RISC-V has come toward production is a question to settle against the toolchain and the silicon a buyer can get this quarter.
A second source costs an extra footprint on the first layout and a few notes in the firmware. Found only after a product ships, the same coverage costs a respin and a full revalidation pass.
Past the edge of the general-purpose part
Once a job needs a real operating system with a memory management unit and gigabytes of external DRAM behind a display, the part has stopped being a microcontroller. It is an application processor. That brings a BGA package and external memory to route on the board. Bring-up stretches into weeks; the supply horizon gets counted in years. The schedule alone adds months to an MCU timeline. Boot leans on an external bootloader and a device tree the firmware team carries. An NXP i.MX or an ST STM32MP pulls in a Linux engineer and a power-sequencing design no MCU ever required. Which industrial application processors hold supply long enough to design around is something those teams pin down before layout, usually from the vendor's published longevity statement for the exact part.
The Cortex-M4 and M7 quietly took over the low and mid-range of what once needed a dedicated DSP, adding single-cycle multiply-accumulate and a floating-point unit to a core teams already knew. Standalone silicon now covers motor control, plus a thin band of hard real-time and high-channel audio work. TI's C2000 has held motor control through several generations, where deterministic loops and dead-time generation pay for the dedicated hardware. Dropping the separate DSP also frees a power rail and a chunk of board area. Outside those corners, the jobs that once demanded a separate DSP now usually close on a Cortex-M7.
On a connected product, the radio and its certification set the schedule. The rest of the design fits around them. A part built to carry Bluetooth Low Energy or a long-range LoRa link gets chosen before the compute load has a say, because RF layout and regulatory approval eat the calendar either way. Picking the wireless SoC by its protocol settles the radio first. The MCU core inside it is whatever the vendor wrapped around that radio.
Coverage thins out at all three of these edges. Behind an application processor, a motor-control DSP, or a certified radio sits a short list of drop-in alternates. A shortage at one of them can stall a build for a full lead time, with no qualified second part to fall back on.
Sizing the decision to the product's life
A consumer gadget that ships for a year can take the cheapest part that meets the spec and carry the risk, because it retires before any sourcing crisis has time to mature. An industrial controller built to run for a decade does not get that luxury. It weighs supply longevity and second-source depth against a few cents of unit price, since one allocation event across ten years wipes out the saving many times over. A ten-year program also budgets for at least one forced redesign somewhere along the way. Medical and automotive sit at the far end, where changing a part reopens qualification that took quarters to close. The first warning a part is on its way out is a move to not-recommended-for-new-design.
