An AI board fails its power design at a specific moment: the instant the accelerator goes from idle to full rate. The average power on the data sheet says little about that moment. A neural engine that draws a fraction of an amp while it waits can call for several amps within a microsecond of the first layer starting, and the rails that feed it either hold their voltage through that step or the silicon browns out, resets, or quietly corrupts an inference. Designing the power tree for an AI board means designing for that edge, not for the mean.

The shape of the problem is set by the load, and this load is unlike a steady processor. Inference arrives in bursts: a frame lands, the accelerator wakes every multiply unit it has, the rail sags toward its undervoltage threshold, and a few milliseconds later the work is done and the current falls away. The power tree has to source the step, absorb the release, and do it again thirty times a second for the life of the product. Each stage of that tree is a part to choose, and the choosing runs from the converter beside the core out to the connector where the supply comes in.

The transient, not the wattage, is the design.

The step that defines the problem

Everything on this page hangs off one event, the load step, and holding the rail steady under a sudden accelerator load is the longer treatment of it. The short form: when the current demand jumps, the regulator's control loop takes time to respond, and for that gap the output capacitors are the only thing holding the rail up. The voltage dips by as much charge as the load pulls before the loop catches up, and the design question is whether that dip stays inside the window the silicon tolerates. Loop bandwidth, capacitor impedance, and the parasitic inductance of the path between converter and load split that budget between them.

The budget is smaller than it looks. A rail specified at three percent has already spent part of that window on regulation accuracy and ripple before the first transient arrives, and what remains is the room the dip is allowed. Where the measurement is taken decides whether the numbers are honest: a rail that looks clean at the converter output can be sagging at the package pins, because the path between them has resistance and inductance the probe at the converter never sees. Measuring at the silicon, under the real firing pattern of the accelerator, is the only version of the test that counts.

A power stage built dense

The first answer to a hard transient is distance. Every milliohm between the converter and the core spends droop budget, so the stage that feeds the accelerator wants to sit against it, and the closer it sits the more its own size becomes the obstacle. That is the case for power stages that pull the inductor, the switches, and the control into one outline measured in millimetres.

TDM22545DXUMA1 as a dense power stage with the inductor inside is that idea in one part: the magnetics that normally dominate the layout are folded into the package, the switching loop shrinks to the scale of the module itself, and the radiated noise and layout sensitivity shrink with it. A stage like this drops beside the load with a handful of external capacitors and takes the hardest rail on the board without asking for the careful inductor placement a discrete design needs. The price is concentration: the heat that a discrete layout spreads across several parts now leaves through one body, and the module is a single line on the bill of materials where a discrete stage offered substitutes for every piece.

Whether that trade pays depends on the board. A compact box with a height limit and a crowded layout takes the module and is glad of it; a cost-driven design with area to spare may do better spending the engineering on a discrete stage it can second-source part by part. Density is bought, not free, and the right question is what the board is short of.

Multiphase for the hungry core

Past a certain current, one phase stops being a sensible shape for the converter. A single inductor and switch pair asked for tens of amps runs hot, needs magnetics that dwarf the load, and leaves the whole transient on one loop. Splitting the rail across phases that interleave their switching divides the current, cancels a share of the ripple, and spreads the heat across the board instead of piling it on one part.

TPS546B24A in multiphase power for a high current core shows what the modern version of that looks like. Several of the parts stack on one rail, share the load current between them without a separate balancing circuit, and answer a load step together, each phase contributing its slice of the response so the dip stays shallower than any one of them could manage alone. The part carries its management interface on PMBus, and that turns the rail from a black box into something the system can read: output voltage, per-phase current, and die temperature are live registers, the rail can be margined up and down in test to prove the timing holds at the corners, and a unit that fails in the field keeps a record of the fault that took it down. On a board that ships in volume, that telemetry is the difference between a returned unit that teaches something and one that is a mystery. The engineering around the part is mostly discipline: the phases want symmetric copper so no one of them runs ahead of the others, the voltage sense wants a Kelvin route from the regulation point at the package pins rather than a convenient trace at the converter, and the sequencing against the other rails on the SoC has to follow the order the silicon's data sheet demands, because a core rail that arrives before its companion can latch a processor into a state no amount of clean regulation will fix. Input capacitance is part of the same story, because the phases draw their charge from the intermediate rail in pulses, and a bank sized for one phase starves four of them; the upstream stage and the multiphase rail are designed as a pair rather than in sequence. The controller's fault limits deserve the same attention as its voltage setting: an overcurrent threshold left at its default can sit above what the inductors tolerate, and a thermal limit set without reading the board's real airflow either trips in normal service or protects nothing. None of that is exotic, and all of it decides whether the rail performs to the numbers the data sheet promised.

The count of phases is a design point, not a virtue. Each phase carries fixed losses that light-load efficiency pays for, so a rail sized for the worst burst idles badly if it cannot shed phases when the accelerator sleeps. Parts in this class drop to fewer phases at light load and pick them back up for the step, and a design that leans on that keeps both ends of the duty cycle honest.

Sized and laid out with that care, the big rail stops being the risk on the board and becomes the example the smaller rails copy.

Stepping the board voltage down

Upstream of the point-of-load stages sits a plainer job: taking whatever the product is fed, a 12 or 24 volt adapter, an industrial bus, a battery stack, and making the intermediate rail the rest of the tree drinks from. This stage sees the input's noise and surges, and its output quality sets the starting point for every converter after it.

LM22676MRX-ADJ/NOPB in board level step down for compute modules is the settled kind of part this stage favours: a wide input range that shrugs at an industrial supply's excursions, an adjustable output that lands wherever the intermediate rail is planned, and a switching frequency low enough to keep its losses calm. It is not the newest part on the page and that is its qualification. The first stage of a tree wants boredom, a converter whose behaviour is known, whose corner cases have been found by other people years ago, and whose output the downstream stages can take for granted.

The support circuitry deserves its own small converter rather than a tap off a busy rail. MP2315 for a compact buck on support circuitry fits that slot: a small, cheap, integrated buck that feeds the fan, the indicator, the USB port, the housekeeping microcontroller, the loads that matter but do not deserve a share of the core rail's transient budget. Splitting them off keeps a fan spin-up from appearing as noise on an inference, and it costs a part the size of a fingernail.

The two-level shape is the quiet reason the rest of the tree behaves. With an intermediate rail in the middle, each point-of-load converter sees a narrow, known input instead of the raw supply, and each can be tuned for its own load instead of compromising for the whole board. The input stage absorbs the ugliness once, and everything downstream designs against a clean number.

The input end of that first stage carries the unglamorous parts that decide survival rather than performance: reverse-polarity protection for the day the connector is forced in backwards, clamping for the surge the cable picks up, filtering so the board neither suffers the supply's noise nor pollutes it. None of it shows up in a demo and all of it shows up in the field.

The rails that are not simple

Not every rail on an AI board is a positive supply feeding digital current. The analog edges of the system, the sensor bias, the amplifier front end, the converter reference, ask for supplies the main tree does not naturally produce, and they fail in subtler ways when those supplies are dirty.

TPS65131RGER where a board needs a positive and a negative rail answers the first case with one part: a boost and an inverting converter in a single package, producing the paired supplies an amplifier stage or a biased sensor expects without spending two separate designs on them. One part, one layout, both polarities, and the board keeps its analog section fed without growing a second power tree.

The second case is noise. A rail that feeds an ADC, a clock, or an image sensor's analog side carries every millivolt of converter ripple straight into the measurement, and the fix is a linear stage after the switcher. TPS7A4700 for a low noise rail next to sensitive analog is built for that position, an LDO whose own noise floor sits in microvolts, taking a switching rail in and handing the analog island a supply quiet enough that the data converter's last bits mean something. The price is the dropout burned as heat, which is why the stage follows a switcher that has already done the efficient work, and why it feeds the island alone rather than the board.

Supply for a part that lives long

Power parts age differently in a catalogue than logic does, and a board that ships for a decade has to plan for that. Planning long term supply for a power module part is its own discipline because a power module is the hardest kind of part to swap: a replacement has to match pinout, control behaviour, loop characteristics, and thermal footprint at once, and a change to any of them reopens qualification on a board that was finished. Naming the second source, or proving the module's longevity programme, belongs in the first design review, before the layout welds the choice in place.

What decides it

The transient decides the architecture. The droop budget is set at the silicon's pins and spent backwards through the tree, and every stage is chosen against the share of that budget it is allowed to consume. A tree designed from the wall inward reads well on paper and fails at the package; designed from the package outward, it works.

Layout carries the same weight as the parts. The loop areas, the sense routes, the symmetry of the phases, and the copper that carries the heat decide whether the chosen parts deliver their data-sheet numbers or a fraction of them, and no later substitution fixes a tree whose geometry was wrong.

Supply closes it, as it does everywhere on the board. Power parts live long lives in long-lived products, the modules among them are the hardest to replace, and the design that names its alternates before the first build is the one still shipping when the first shortage arrives.